x86: Fix NMI injection to PV guests

Signed-off-by: Juergen Gross <juergen.gross@ts.fujitsu.com>

diff --git a/xen/arch/x86/x86_32/entry.S b/xen/arch/x86/x86_32/entry.S
index 57915e295ea6251db92d72497031fb4616b13398..46c1f9452c15d7c0f1d48c04a65deab094dada1d 100644 (file)
--- a/xen/arch/x86/x86_32/entry.S
+++ b/xen/arch/x86/x86_32/entry.S
@@ -264,7 +264,7 @@ process_mce:
         ALIGN
 /* %ebx: struct vcpu */
 process_nmi:
-        cmpw $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%ebx)
+        testb $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%ebx)
         jnz  test_guest_events
         sti
         movb $0,VCPU_nmi_pending(%ebx)

diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compat/entry.S
index 06581f093494fe3ffe6c9bc2f67a1b755ef6d324..d668822cbb4676bb9e8a00106e537dfcd06db183 100644 (file)
--- a/xen/arch/x86/x86_64/compat/entry.S
+++ b/xen/arch/x86/x86_64/compat/entry.S
@@ -137,7 +137,7 @@ compat_process_mce:
        ALIGN
 /* %rbx: struct vcpu */
 compat_process_nmi:
-        cmpw $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%rbx)
+        testb $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%rbx)
         jnz  compat_test_guest_events
         sti
         movb  $0,VCPU_nmi_pending(%rbx)

diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
index 8bb3e228c18811ded090f262afe040af26c50db1..05290484ec1e27547e64dad20f4465afe0f2eea3 100644 (file)
--- a/xen/arch/x86/x86_64/entry.S
+++ b/xen/arch/x86/x86_64/entry.S
@@ -239,7 +239,7 @@ process_mce:
         ALIGN
 /* %rbx: struct vcpu */
 process_nmi:
-        cmpw $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%rbx)
+        testb $1 << VCPU_TRAP_NMI,VCPU_async_exception_mask(%rbx)
         jnz  test_guest_events
         sti
         movb $0,VCPU_nmi_pending(%rbx)